Semiconductor expertise defines the academic and professional profile of Prof. Changhwan Shin, a distinguished scholar and leader in nanometer-scale semiconductor circuits, devices, and technology. Prof. Changhwan Shin is currently a Professor in the School of Electrical Engineering at Korea University and serves as Vice Dean for Planning in the College of Engineering, bringing together deep academic insight and strategic leadership. He earned his Ph.D. in Electrical Engineering and Computer Sciences from the University of California, Berkeley, under the guidance of Prof. Tsu-Jae King Liu and Prof. Borivoje Nikolić, following a top-honors B.S. degree from Korea University. Prof. Changhwan Shin’s professional experience spans academia and industry, including senior roles at the University of Seoul, Sungkyunkwan University, SK hynix as an Independent Director, and industrial positions at Xilinx and IBM Microelectronics. His research interests focus on advanced electron device architectures for SoC memory and logic, steep-switching devices such as negative capacitance and feedback FETs, TCAD-based variability analysis of nanometer-scale devices, and low-level digital and analog circuit design methodologies. Prof. Changhwan Shin’s research skills integrate device physics, circuit–technology co-design, and semiconductor process modeling. His awards and honors include repeated leadership appointments such as Vice Dean roles and recognition for academic excellence and technological impact. In conclusion, Prof. Changhwan Shin exemplifies innovation, leadership, and sustained contribution to the advancement of semiconductor engineering and education worldwide.
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Featured Publications
Feedback FET: A Novel Transistor Exhibiting Steep Switching Behavior at Low Bias Voltages
A. Padilla, C.W. Yeung, C. Shin, C. Hu, T.J.K. Liu
IEEE International Electron Devices Meeting, 2008
Citations: 249
Negative Capacitance Field Effect Transistor with Hysteresis-Free Sub-60 mV/decade Switching
J. Jo, C. Shin
IEEE Electron Device Letters, 2016
Citations: 240
Negative Capacitance in Organic/Ferroelectric Capacitor to Implement Steep Switching MOS Devices
J. Jo, W.Y. Choi, J.D. Park, J.W. Shim, H.Y. Yu, C. Shin
Nano Letters, 2015
Citations: 214
Study of Random Dopant Fluctuation Effects in Germanium-Source Tunnel FETs
N. Damrongplasit, C. Shin, S.H. Kim, R.A. Vega, T.J.K. Liu
IEEE Transactions on Electron Devices, 2011
Citations: 185
Negative Capacitance FinFET with Sub-20 mV/decade Subthreshold Slope and Minimal Hysteresis of 0.48 V
E. Ko, J.W. Lee, C. Shin
IEEE Electron Device Letters, 2017
Citations: 141
Vertical Tunnel FET: Design Optimization with Triple Metal-Gate Layers
E. Ko, H. Lee, J.D. Park, C. Shin
IEEE Transactions on Electron Devices, 2016
Citations: 124